diff options
| author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-18 20:12:13 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-18 20:12:13 +0000 |
| commit | 607614d0a9cb589c914d92c1b8957b8141dcaf8e (patch) | |
| tree | 76cd959e4051eafe99a8fc2b9fbd27c85acdbb93 /src/southbridge/intel/i82870 | |
| parent | 24f324cb855b77db17b543feed72a03da0e06bc6 (diff) | |
Fix/drop some obsolete comments,
- s/Options.lb/devicetree.cb/
- s/Config.lb/devicetree.cb/
- s/cache_as_ram_auto.c/romstage.c/
- h8dmr_fam10/README: Drop obsolete comment, we have mc_patch_01000086.h in
the tree now.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6095 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82870')
| -rw-r--r-- | src/southbridge/intel/i82870/p64h2_ioapic.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/intel/i82870/p64h2_ioapic.c b/src/southbridge/intel/i82870/p64h2_ioapic.c index 8af57beed7..6a0f0d222f 100644 --- a/src/southbridge/intel/i82870/p64h2_ioapic.c +++ b/src/southbridge/intel/i82870/p64h2_ioapic.c @@ -40,10 +40,10 @@ static void p64h2_ioapic_init(device_t dev) // A note on IOAPIC addresses: // 0 and 1 are used for the local APICs of the dual virtual - // (hyper-threaded) CPUs of physical CPU 0 (mainboard/Config.lb). + // (hyper-threaded) CPUs of physical CPU 0 (devicetree.cb). // 6 and 7 are used for the local APICs of the dual virtual - // (hyper-threaded) CPUs of physical CPU 1 (mainboard/Config.lb). - // 2 is used for the IOAPIC in the 82801 Southbridge (hard-coded in i82801xx_lpc.c) + // (hyper-threaded) CPUs of physical CPU 1 (devicetree.cb). + // 2 is used for the IOAPIC in the 82801 southbridge (hard-coded in i82801xx_lpc.c) // Map APIC index into APIC ID // IDs 3, 4, 5, and 8+ are available (see above note) |