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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-05-28 13:39:20 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-07-08 14:54:13 +0000 |
| commit | aadd1d0eaf860c6b503f4f10e17ea0abec6a9939 (patch) | |
| tree | 019ddf5b904d86b65186306ee98ef7cdbc7c731d /src/southbridge/intel/i82870/pcibridge.c | |
| parent | b429c5be15dd4263e8ddb599e1e1f15dd95c3bf0 (diff) | |
sb/intel/ibexpeak: Use common final SPI OPs setup
This also removes the relevant RCBA replays the mainboard dir.
Change-Id: I75dd9d1bcd09d835f205a51c087d52ebb4e166f6
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33038
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Diffstat (limited to 'src/southbridge/intel/i82870/pcibridge.c')
0 files changed, 0 insertions, 0 deletions