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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-01-07 12:00:31 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-01-14 18:13:15 +0000
commit1cfafe25e37d3a396a19bfe524af16284ff41070 (patch)
treefa48bc17e9070649105b4ee48ffd7c20700e6332 /src/southbridge/intel/i82801jx
parent7adc370dc79af1aacd6f811b9b28d01d595da702 (diff)
intel/{gm45,x4x},i82801{ix|jx}: Move enable_smbus() call
Change-Id: Idc7631abb550b31af722ccf3b69afdc01fdb616e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38268 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801jx')
-rw-r--r--src/southbridge/intel/i82801jx/early_init.c3
-rw-r--r--src/southbridge/intel/i82801jx/i82801jx.h2
2 files changed, 4 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82801jx/early_init.c b/src/southbridge/intel/i82801jx/early_init.c
index 1afc6b365f..87831bbd05 100644
--- a/src/southbridge/intel/i82801jx/early_init.c
+++ b/src/southbridge/intel/i82801jx/early_init.c
@@ -81,6 +81,9 @@ void i82801jx_early_init(void)
{
const pci_devfn_t d31f0 = PCI_DEV(0, 0x1f, 0);
+ if (ENV_ROMSTAGE)
+ enable_smbus();
+
printk(BIOS_DEBUG, "Setting up static southbridge registers...");
i82801jx_setup_bars();
printk(BIOS_DEBUG, " done.\n");
diff --git a/src/southbridge/intel/i82801jx/i82801jx.h b/src/southbridge/intel/i82801jx/i82801jx.h
index 26a99f42f7..2c5135ebfd 100644
--- a/src/southbridge/intel/i82801jx/i82801jx.h
+++ b/src/southbridge/intel/i82801jx/i82801jx.h
@@ -225,8 +225,8 @@ static inline int lpc_is_mobile(const u16 devid)
}
#define LPC_IS_MOBILE(dev) lpc_is_mobile(pci_read_config16(dev, PCI_DEVICE_ID))
-#if ENV_ROMSTAGE
void enable_smbus(void);
+#if ENV_ROMSTAGE
int smbus_read_byte(unsigned int device, unsigned int address);
int i2c_eeprom_read(unsigned int device, unsigned int cmd, unsigned int bytes,
u8 *buf);