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authorAngel Pons <th3fanbus@gmail.com>2020-12-05 19:02:14 +0100
committerHung-Te Lin <hungte@chromium.org>2020-12-17 13:55:23 +0000
commit7f839f66ea552ad939a8a8de6d3afec2934f3868 (patch)
tree180ed2a91b7719b7350172ef3345ecaef4e0485f /src/southbridge/intel/i82801jx
parent4919028e6207e011f93488732ebaaf70b8377cd5 (diff)
azalia: Use `azalia_exit_reset` function
Change-Id: I346040eb6531dac6c066a96cd73033aa17f026d0 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48356 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/southbridge/intel/i82801jx')
-rw-r--r--src/southbridge/intel/i82801jx/azalia.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/southbridge/intel/i82801jx/azalia.c b/src/southbridge/intel/i82801jx/azalia.c
index 3ac0a4a470..bea2e9000b 100644
--- a/src/southbridge/intel/i82801jx/azalia.c
+++ b/src/southbridge/intel/i82801jx/azalia.c
@@ -19,8 +19,7 @@ static int codec_detect(u8 *base)
if (azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0) < 0)
goto no_codec;
- /* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
- if (azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0)
+ if (azalia_exit_reset(base) < 0)
goto no_codec;
/* Read in Codec location (BAR + 0xe)[2..0] */