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authorElyes Haouas <ehaouas@noos.fr>2022-11-18 15:07:03 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-11-22 13:41:55 +0000
commit723b896330df395158fa5db07cf555f135011bac (patch)
tree593b2332edfe59ba450125cca591832e17be9c3e /src/southbridge/intel/i82801jx
parentd369c662561402cba057bebf7c6e83d5a967a547 (diff)
src/southbridge: Remove unnecessary space after casts
Change-Id: Ib82968724696110a8d1655928db5b2a665525d20 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69805 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801jx')
-rw-r--r--src/southbridge/intel/i82801jx/sata.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/i82801jx/sata.c b/src/southbridge/intel/i82801jx/sata.c
index 4e014817c9..1694d3caf0 100644
--- a/src/southbridge/intel/i82801jx/sata.c
+++ b/src/southbridge/intel/i82801jx/sata.c
@@ -45,8 +45,8 @@ static void sata_enable_ahci_mmap(struct device *const dev, const u8 port_map)
/* PI (Ports implemented) */
write32(abar + 0x0c, port_map);
/* PCH code reads back twice, do we need it, too? */
- (void) read32(abar + 0x0c); /* Read back 1 */
- (void) read32(abar + 0x0c); /* Read back 2 */
+ (void)read32(abar + 0x0c); /* Read back 1 */
+ (void)read32(abar + 0x0c); /* Read back 2 */
/* VSP (Vendor Specific Register) */
reg32 = read32(abar + 0xa0);