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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-06-29 05:57:12 +0300
committerPatrick Georgi <pgeorgi@google.com>2021-01-04 23:15:46 +0000
commit8c2cc68b1ac9e1fb2011bcb669df04b4c8cad351 (patch)
treed58be6725fbfc4c15034a630afdb8262e2fca84e /src/southbridge/intel/i82801jx
parentc5a3a4a602f938dbc6e2e63c96522e0b74b6c814 (diff)
arch/x86: Pass GNVS as parameter to SMM module
Change-Id: I9d7417462830443f9c96273d2cc326cbcc3b17dd Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48698 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801jx')
-rw-r--r--src/southbridge/intel/i82801jx/lpc.c2
-rw-r--r--src/southbridge/intel/i82801jx/smihandler.c5
2 files changed, 0 insertions, 7 deletions
diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c
index 1f4cf29187..ad9bac1da6 100644
--- a/src/southbridge/intel/i82801jx/lpc.c
+++ b/src/southbridge/intel/i82801jx/lpc.c
@@ -485,8 +485,6 @@ void southbridge_inject_dsdt(const struct device *dev)
memset(gnvs, 0, sizeof(*gnvs));
acpi_create_gnvs(gnvs);
- /* And tell SMI about it */
- apm_control(APM_CNT_GNVS_UPDATE);
/* Add it to SSDT. */
acpigen_write_scope("\\");
diff --git a/src/southbridge/intel/i82801jx/smihandler.c b/src/southbridge/intel/i82801jx/smihandler.c
index 7d79620114..6a6c5b4c7f 100644
--- a/src/southbridge/intel/i82801jx/smihandler.c
+++ b/src/southbridge/intel/i82801jx/smihandler.c
@@ -13,11 +13,6 @@
* initialize it with a sane value
*/
u16 pmbase = DEFAULT_PMBASE;
-u8 smm_initialized = 0;
-
-/* This implementation was removed since it was invalid. There will be one shared
- approach to set GNVS pointer into SMM without the 0xEA PM Trap mentioned above. */
-void southbridge_update_gnvs(u8 apm_cnt, int *smm_done) { }
int southbridge_io_trap_handler(int smif)
{