diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-06-08 02:09:33 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-06-12 00:12:17 +0000 |
| commit | 2048cb43863f014fedc4ff44233d49410f0cee5e (patch) | |
| tree | 1be140c2bf5bd48f278039d1c32d5fa382379a86 /src/southbridge/intel/i82801jx/smbus.c | |
| parent | efd23d92efb982f74b8473201bc93b1c0ad64bc8 (diff) | |
sb/intel/i82801jx: Use PCI bitwise ops
Tested with BUILD_TIMELESS=1, Intel DG43GT does not change.
Change-Id: Ifd5b8cd7644811a56afae82468c8eb0a7b6b7ff9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42157
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801jx/smbus.c')
| -rw-r--r-- | src/southbridge/intel/i82801jx/smbus.c | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/src/southbridge/intel/i82801jx/smbus.c b/src/southbridge/intel/i82801jx/smbus.c index 4f45d8a5cb..32b64b89df 100644 --- a/src/southbridge/intel/i82801jx/smbus.c +++ b/src/southbridge/intel/i82801jx/smbus.c @@ -11,12 +11,8 @@ static void pch_smbus_init(struct device *dev) { - u16 reg16; - /* Enable clock gating */ - reg16 = pci_read_config16(dev, 0x80); - reg16 &= ~((1 << 8)|(1 << 10)|(1 << 12)|(1 << 14)); - pci_write_config16(dev, 0x80, reg16); + pci_and_config16(dev, 0x80, ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14))); } static int lsmbus_read_byte(struct device *dev, u8 address) |