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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-06-01 15:11:14 +0300
committerPatrick Georgi <pgeorgi@google.com>2020-06-16 08:02:18 +0000
commitb6585481e8cb30ed04a1673b170af3df9e0e4320 (patch)
tree09d4fad217ffb0dd6fb33b4d8e4c8dc20bfd708f /src/southbridge/intel/i82801jx/lpc.c
parent94464474756f0cacdf04a70b95ec4a0462516a63 (diff)
arch/x86: Create helper for APM_CNT SMI triggers
Attempts to write to APM_CNT IO port should always be guarded with a test to verify SMI handler has been installed. Immediate followup removes redundant HAVE_SMI_HANDLER tests. Change-Id: If3fb0f1a8b32076f1d9f3fea9f817dd4b093ad98 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41971 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801jx/lpc.c')
-rw-r--r--src/southbridge/intel/i82801jx/lpc.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c
index 07cf5274a5..d12e061226 100644
--- a/src/southbridge/intel/i82801jx/lpc.c
+++ b/src/southbridge/intel/i82801jx/lpc.c
@@ -349,12 +349,9 @@ static void i82801jx_set_acpi_mode(struct device *dev)
{
if (CONFIG(HAVE_SMI_HANDLER)) {
if (!acpi_is_wakeup_s3()) {
- printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n");
- outb(APM_CNT_ACPI_DISABLE, APM_CNT); // Disable ACPI mode
- printk(BIOS_DEBUG, "done.\n");
+ apm_control(APM_CNT_ACPI_DISABLE);
} else {
- printk(BIOS_DEBUG, "S3 wakeup, enabling ACPI via APMC\n");
- outb(APM_CNT_ACPI_ENABLE, APM_CNT);
+ apm_control(APM_CNT_ACPI_ENABLE);
}
}
}