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authorAngel Pons <th3fanbus@gmail.com>2020-08-10 13:52:21 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-08-12 10:56:24 +0000
commit851fe8334e75d1b3f372f7878745d65c236a12a4 (patch)
tree959ddbe5bed09a527f79de689fddd3f94f3ef20a /src/southbridge/intel/i82801jx/i82801jx.c
parentbcc2c729dd2ed7c60cb52f3852da5c3bc809c748 (diff)
sb/intel/i82801jx: Drop is-mobile checks
There's no mobile ICH10 variant. This was copied from i82801ix. Change-Id: I141da407e336f6fbbf84d0e2cee55b0c12931c7b Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44335 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Michael Niewöhner
Diffstat (limited to 'src/southbridge/intel/i82801jx/i82801jx.c')
-rw-r--r--src/southbridge/intel/i82801jx/i82801jx.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/src/southbridge/intel/i82801jx/i82801jx.c b/src/southbridge/intel/i82801jx/i82801jx.c
index a332ec079b..6f90301419 100644
--- a/src/southbridge/intel/i82801jx/i82801jx.c
+++ b/src/southbridge/intel/i82801jx/i82801jx.c
@@ -46,14 +46,6 @@ static void i82801jx_pcie_init(const config_t *const info)
pci_write_config8(pciePort[i], 0x324, 0x40);
}
- if (LPC_IS_MOBILE(pcidev_on_root(0x1f, 0))) {
- for (i = 0; i < 6; ++i) {
- if (pciePort[i]->enabled) {
- pci_or_config32(pciePort[i], 0xe8, 1);
- }
- }
- }
-
for (i = 5; (i >= 0) && !pciePort[i]->enabled; --i) {
/* Only for the top disabled ports. */
pci_or_config32(pciePort[i], 0x300, 0x3 << 16);