diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-04-12 10:53:30 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-07-25 15:15:28 +0000 |
| commit | 87af36ac172b0ec48b078453ed4f2fd8d2a62a22 (patch) | |
| tree | b0756abcf0e6d5c9add3360fca6f030fe47931bd /src/southbridge/intel/i82801jx/chip.h | |
| parent | 7d96565190c7afbca6eb1ed69b1191597b6e0644 (diff) | |
sb/intel/i82801jx: Route all PIRQ to INT11
Interrupt 11 is not used by legacy devices and so can always be used
for PCI interrupts. Full legacy IRQ routing is complicated and hard to
get right.
Change-Id: I6c718f4b9fb91ffcc4a136120581a4fcd7ec7231
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19254
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/intel/i82801jx/chip.h')
| -rw-r--r-- | src/southbridge/intel/i82801jx/chip.h | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/src/southbridge/intel/i82801jx/chip.h b/src/southbridge/intel/i82801jx/chip.h index 95d0d75cc1..533254a872 100644 --- a/src/southbridge/intel/i82801jx/chip.h +++ b/src/southbridge/intel/i82801jx/chip.h @@ -24,19 +24,6 @@ enum { struct southbridge_intel_i82801jx_config { /** - * Interrupt Routing configuration - * If bit7 is 1, the interrupt is disabled. - */ - uint8_t pirqa_routing; - uint8_t pirqb_routing; - uint8_t pirqc_routing; - uint8_t pirqd_routing; - uint8_t pirqe_routing; - uint8_t pirqf_routing; - uint8_t pirqg_routing; - uint8_t pirqh_routing; - - /** * GPI Routing configuration * * Only the lower two bits have a meaning: |