diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2017-04-09 20:48:37 +0200 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-07-21 15:44:19 +0000 |
commit | 349e08535a7666cabe52ebc331e3bce5468b786b (patch) | |
tree | 6e337227e7450ac1d931ac61eaf939ae936ad50c /src/southbridge/intel/i82801jx/chip.h | |
parent | 7b9c139ac26eded525980e896b354c99c08cdca7 (diff) |
sb/intel/i82801jx: Add correct PCI ids and change names
Change-Id: Ic9226098dafa2465aa5fccc72c442de2b94e44c7
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19249
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/intel/i82801jx/chip.h')
-rw-r--r-- | src/southbridge/intel/i82801jx/chip.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/intel/i82801jx/chip.h b/src/southbridge/intel/i82801jx/chip.h index 307b751fab..f22748bc05 100644 --- a/src/southbridge/intel/i82801jx/chip.h +++ b/src/southbridge/intel/i82801jx/chip.h @@ -14,15 +14,15 @@ * GNU General Public License for more details. */ -#ifndef SOUTHBRIDGE_INTEL_I82801IX_CHIP_H -#define SOUTHBRIDGE_INTEL_I82801IX_CHIP_H +#ifndef SOUTHBRIDGE_INTEL_I82801JX_CHIP_H +#define SOUTHBRIDGE_INTEL_I82801JX_CHIP_H enum { THTL_DEF = 0, THTL_87_5 = 1, THTL_75_0 = 2, THTL_62_5 = 3, THTL_50_0 = 4, THTL_37_5 = 5, THTL_25_0 = 6, THTL_12_5 = 7 }; -struct southbridge_intel_i82801ix_config { +struct southbridge_intel_i82801jx_config { /** * Interrupt Routing configuration * If bit7 is 1, the interrupt is disabled. @@ -88,4 +88,4 @@ struct southbridge_intel_i82801ix_config { uint8_t pcie_hotplug_map[8]; }; -#endif /* SOUTHBRIDGE_INTEL_I82801IX_CHIP_H */ +#endif /* SOUTHBRIDGE_INTEL_I82801JX_CHIP_H */ |