diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-04-09 20:48:37 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-07-21 15:44:19 +0000 |
| commit | 349e08535a7666cabe52ebc331e3bce5468b786b (patch) | |
| tree | 6e337227e7450ac1d931ac61eaf939ae936ad50c /src/southbridge/intel/i82801jx/acpi | |
| parent | 7b9c139ac26eded525980e896b354c99c08cdca7 (diff) | |
sb/intel/i82801jx: Add correct PCI ids and change names
Change-Id: Ic9226098dafa2465aa5fccc72c442de2b94e44c7
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19249
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/intel/i82801jx/acpi')
| -rw-r--r-- | src/southbridge/intel/i82801jx/acpi/audio.asl | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801jx/acpi/ich10.asl (renamed from src/southbridge/intel/i82801jx/acpi/ich9.asl) | 6 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801jx/acpi/lpc.asl | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801jx/acpi/pci.asl | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801jx/acpi/usb.asl | 2 |
5 files changed, 8 insertions, 8 deletions
diff --git a/src/southbridge/intel/i82801jx/acpi/audio.asl b/src/southbridge/intel/i82801jx/acpi/audio.asl index b09f2af34d..afae905079 100644 --- a/src/southbridge/intel/i82801jx/acpi/audio.asl +++ b/src/southbridge/intel/i82801jx/acpi/audio.asl @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -/* Intel i82801I HDA */ +/* Intel i82801L HDA */ // Intel High Definition Audio (Azalia) 0:1b.0 diff --git a/src/southbridge/intel/i82801jx/acpi/ich9.asl b/src/southbridge/intel/i82801jx/acpi/ich10.asl index 143ecb1f2d..da8b789baa 100644 --- a/src/southbridge/intel/i82801jx/acpi/ich9.asl +++ b/src/southbridge/intel/i82801jx/acpi/ich10.asl @@ -27,7 +27,7 @@ Scope(\) TRP0, 8 // IO-Trap at 0x808 } - // ICH9 Power Management Registers, located at PMBASE (0x1f.0 0x40.l) + // ICH10 Power Management Registers, located at PMBASE (0x1f.0 0x40.l) OperationRegion(PMIO, SystemIO, DEFAULT_PMBASE, 0x80) Field(PMIO, ByteAcc, NoLock, Preserve) { @@ -42,7 +42,7 @@ Scope(\) } // FIXME: purposes of the GPIOs (comments) are probably wrong - // ICH9 GPIO IO mapped registers (0x1f.0 reg 0x48.l) + // ICH10 GPIO IO mapped registers (0x1f.0 reg 0x48.l) OperationRegion(GPIO, SystemIO, DEFAULT_GPIOBASE, 0x3c) Field(GPIO, ByteAcc, NoLock, Preserve) { @@ -124,7 +124,7 @@ Scope(\) } - // ICH9 Root Complex Register Block. Memory Mapped through RCBA) + // ICH10 Root Complex Register Block. Memory Mapped through RCBA) OperationRegion(RCRB, SystemMemory, DEFAULT_RCBA, 0x4000) Field(RCRB, DWordAcc, Lock, Preserve) { diff --git a/src/southbridge/intel/i82801jx/acpi/lpc.asl b/src/southbridge/intel/i82801jx/acpi/lpc.asl index 9d27b0b482..1d9e54e237 100644 --- a/src/southbridge/intel/i82801jx/acpi/lpc.asl +++ b/src/southbridge/intel/i82801jx/acpi/lpc.asl @@ -170,8 +170,8 @@ Device (LPCB) IO (Decode16, 0x92, 0x92, 0x1, 0x01) // CPU Reserved IO (Decode16, 0xb2, 0xb2, 0x1, 0x02) // SWSMI IO (Decode16, 0x800, 0x800, 0x1, 0x10) // ACPI I/O trap - IO (Decode16, DEFAULT_PMBASE, DEFAULT_PMBASE, 0x1, 0x80) // ICH9 ACPI - IO (Decode16, DEFAULT_GPIOBASE, DEFAULT_GPIOBASE, 0x1, 0x40) // ICH9 GPIO + IO (Decode16, DEFAULT_PMBASE, DEFAULT_PMBASE, 0x1, 0x80) // ICH10 ACPI + IO (Decode16, DEFAULT_GPIOBASE, DEFAULT_GPIOBASE, 0x1, 0x40) // ICH10 GPIO }) } diff --git a/src/southbridge/intel/i82801jx/acpi/pci.asl b/src/southbridge/intel/i82801jx/acpi/pci.asl index f2988e1951..de164249ee 100644 --- a/src/southbridge/intel/i82801jx/acpi/pci.asl +++ b/src/southbridge/intel/i82801jx/acpi/pci.asl @@ -65,7 +65,7 @@ Device (PCIB) Method (_PRT) { - #include "acpi/ich9_pci_irqs.asl" + #include "acpi/ich10_pci_irqs.asl" } } diff --git a/src/southbridge/intel/i82801jx/acpi/usb.asl b/src/southbridge/intel/i82801jx/acpi/usb.asl index 5fa751a20d..b621263cd4 100644 --- a/src/southbridge/intel/i82801jx/acpi/usb.asl +++ b/src/southbridge/intel/i82801jx/acpi/usb.asl @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -/* Intel i82801I USB support */ +/* Intel i82801J USB support */ // USB Controller 0:1d.0 |