aboutsummaryrefslogtreecommitdiff
path: root/src/southbridge/intel/i82801jx/Kconfig
diff options
context:
space:
mode:
authorArthur Heymans <arthur@aheymans.xyz>2017-04-09 20:40:39 +0200
committerMartin Roth <martinroth@google.com>2017-07-21 15:43:18 +0000
commit7b9c139ac26eded525980e896b354c99c08cdca7 (patch)
treea30eb4f79395626495a106b7ca1f138753c90636 /src/southbridge/intel/i82801jx/Kconfig
parentc3198543b690fbdeda0f1e1ffaf78048fe765ec0 (diff)
sb/intel/i82801jx: Copy i82801ix
Change-Id: I878960e7e0f992426382ca717b8b42787f01ebc6 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19248 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/intel/i82801jx/Kconfig')
-rw-r--r--src/southbridge/intel/i82801jx/Kconfig43
1 files changed, 43 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801jx/Kconfig b/src/southbridge/intel/i82801jx/Kconfig
new file mode 100644
index 0000000000..99dd1aaea9
--- /dev/null
+++ b/src/southbridge/intel/i82801jx/Kconfig
@@ -0,0 +1,43 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2008-2009 coresystems GmbH
+## 2012 secunet security Networks AG
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+config SOUTHBRIDGE_INTEL_I82801JX
+ bool
+ select SOUTHBRIDGE_INTEL_COMMON
+ select IOAPIC
+ select HAVE_USBDEBUG
+ select HAVE_HARD_RESET
+ select USE_WATCHDOG_ON_BOOT
+ select HAVE_SMI_HANDLER
+ select HAVE_USBDEBUG_OPTIONS
+ select SOUTHBRIDGE_INTEL_COMMON_GPIO
+ select HAVE_INTEL_FIRMWARE
+
+if SOUTHBRIDGE_INTEL_I82801JX
+
+config EHCI_BAR
+ hex
+ default 0xfef00000
+
+config HPET_MIN_TICKS
+ hex
+ default 0x80
+
+config BOOTBLOCK_SOUTHBRIDGE_INIT
+ string
+ default "southbridge/intel/i82801ix/bootblock.c"
+
+endif