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authorPatrick Rudolph <patrick.rudolph@9elements.com>2019-04-13 16:56:23 +0200
committerPatrick Rudolph <siro@das-labor.org>2019-04-16 08:58:41 +0000
commitad0b48222ffd894f1b8f78e7de8a6ee139fc17c9 (patch)
tree66d38257c482200385a4f2347af116c020434c66 /src/southbridge/intel/i82801ix
parent41dad286d846819242a84fc65faed2bbb35845ac (diff)
sb/intel/i82801ix: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB
Use common code to detect ACPI S3. Untested. Change-Id: I618d4c25adb0d2b9bbd59a3b3b84beac78db1916 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32315 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel/i82801ix')
-rw-r--r--src/southbridge/intel/i82801ix/Kconfig1
-rw-r--r--src/southbridge/intel/i82801ix/lpc.c3
2 files changed, 1 insertions, 3 deletions
diff --git a/src/southbridge/intel/i82801ix/Kconfig b/src/southbridge/intel/i82801ix/Kconfig
index 571778a020..44b2cbc0e6 100644
--- a/src/southbridge/intel/i82801ix/Kconfig
+++ b/src/southbridge/intel/i82801ix/Kconfig
@@ -26,6 +26,7 @@ config SOUTHBRIDGE_INTEL_I82801IX
select HAVE_USBDEBUG_OPTIONS
select SOUTHBRIDGE_INTEL_COMMON_GPIO
select SOUTHBRIDGE_INTEL_COMMON_SMM
+ select SOUTHBRIDGE_INTEL_COMMON_PMCLIB
select INTEL_DESCRIPTOR_MODE_CAPABLE
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index ce47c590bc..4cc1cea02c 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -283,9 +283,6 @@ static void i82801ix_power_options(struct device *dev)
will be constantly fired and OSPM must
not know about it (ACPI spec says to
ignore the bit). */
- reg32 = inl(pmbase + 0x04); // PM1_CNT
- reg32 &= ~(7 << 10); // SLP_TYP
- outl(reg32, pmbase + 0x04);
/* Set duty cycle for hardware throttling (defaults to 0x0: 50%). */
reg32 = inl(pmbase + 0x10);