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authorKevin Paul Herbert <kph@meraki.net>2014-12-24 18:43:20 -0800
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2015-02-15 08:50:22 +0100
commitbde6d309dfafe58732ec46314a2d4c08974b62d4 (patch)
tree17ba00565487ddfbb5759c96adfbb3fffe2a4550 /src/southbridge/intel/i82801ix/lpc.c
parent4b10dec1a66122b515b2191f823d7fd379ec655f (diff)
x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
On x86, change the type of the address parameter in read8()/read16/read32()/write8()/write16()/write32() to be a pointer, instead of unsigned long. Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330 Signed-off-by: Kevin Paul Herbert <kph@meraki.net> Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/7784 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/intel/i82801ix/lpc.c')
-rw-r--r--src/southbridge/intel/i82801ix/lpc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index 6038eff114..0ba33d6759 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -62,7 +62,7 @@ static void i82801ix_enable_apic(struct device *dev)
*ioapic_index = 0x01;
*ioapic_data = reg32;
- setup_ioapic(IO_APIC_ADDR, 2); /* ICH7 code uses id 2. */
+ setup_ioapic(VIO_APIC_VADDR, 2); /* ICH7 code uses id 2. */
}
static void i82801ix_enable_serial_irqs(struct device *dev)