sb/intel/i82801ix: Get rid of device_t

Use of device_t has been abandoned in ramstage.

Change-Id: Iefef4e72f1012c8a6edbb9e5c94bdc162bed93d0
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26256
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

1 files changed, 10 insertions, 10 deletions

diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index abc8667a67..76f16e7853 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -90,9 +90,9 @@ static void i82801ix_enable_serial_irqs(struct device *dev)
  * 0x80 - The PIRQ is not routed.
  */
 
-static void i82801ix_pirq_init(device_t dev)
+static void i82801ix_pirq_init(struct device *dev)
 {
-	device_t irq_dev;
+	struct device *irq_dev;
 	/* Get the chip configuration */
 	config_t *config = dev->chip_info;
 
@@ -132,7 +132,7 @@ static void i82801ix_pirq_init(device_t dev)
 	}
 }
 
-static void i82801ix_gpi_routing(device_t dev)
+static void i82801ix_gpi_routing(struct device *dev)
 {
 	/* Get the chip configuration */
 	config_t *config = dev->chip_info;
@@ -161,7 +161,7 @@ static void i82801ix_gpi_routing(device_t dev)
 	pci_write_config32(dev, D31F0_GPIO_ROUT, reg32);
 }
 
-static void i82801ix_power_options(device_t dev)
+static void i82801ix_power_options(struct device *dev)
 {
 	u8 reg8;
 	u16 reg16, pmbase;
@@ -293,7 +293,7 @@ static void i82801ix_power_options(device_t dev)
 	outl(reg32, pmbase + 0x10);
 }
 
-static void i82801ix_configure_cstates(device_t dev)
+static void i82801ix_configure_cstates(struct device *dev)
 {
 	u8 reg8;
 
@@ -469,7 +469,7 @@ static void lpc_init(struct device *dev)
 #endif
 }
 
-static void i82801ix_lpc_read_resources(device_t dev)
+static void i82801ix_lpc_read_resources(struct device *dev)
 {
 	/*
 	 *             I/O Resources
@@ -525,7 +525,7 @@ static void i82801ix_lpc_read_resources(device_t dev)
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }
 
-static void set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void set_subsystem(struct device *dev, unsigned vendor, unsigned device)
 {
 	if (!vendor || !device) {
 		pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
@@ -536,7 +536,7 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device)
 	}
 }
 
-static void southbridge_inject_dsdt(device_t dev)
+static void southbridge_inject_dsdt(struct device *dev)
 {
 	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
 
@@ -558,9 +558,9 @@ static void southbridge_inject_dsdt(device_t dev)
 	}
 }
 
-static void southbridge_fill_ssdt(device_t device)
+static void southbridge_fill_ssdt(struct device *device)
 {
-	device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f,0));
+	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x1f,0));
 	config_t *chip = dev->chip_info;
 
 	intel_acpi_pcie_hotplug_generator(chip->pcie_hotplug_map, 8);