summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/i82801ix/lpc.c
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-12-29 06:26:21 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-01-18 07:21:34 +0000
commit661ad4666ca0e78195f6901fce7b44a7e56e6331 (patch)
tree57c25cee551ec747dcfdf0e38f995a091d5fcd79 /src/southbridge/intel/i82801ix/lpc.c
parent286a0572e75ade325238617d15c136f74c4f67a4 (diff)
ACPI: Select ACPI_SOC_NVS only where suitable
Having some symmetry with <soc/nvs.h> now allows to reduce the amount of gluelogic to determine the size and cbmc field of struct global_nvs. Since GNVS creation is now controlled by ACPI_SOC_NVS, drivers/amd/agesa/nvs.c becomes obsolete and soc/amd/cezanne cannot have this selected until <soc/nvs.h> exists. Change-Id: Ia9ec853ff7f5e7908f7e8fc179ac27d0da08e19d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49344 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Lance Zhao
Diffstat (limited to 'src/southbridge/intel/i82801ix/lpc.c')
-rw-r--r--src/southbridge/intel/i82801ix/lpc.c13
1 files changed, 0 insertions, 13 deletions
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index 0b58e67425..b84b458027 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -12,13 +12,11 @@
#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <acpi/acpi.h>
-#include <acpi/acpi_gnvs.h>
#include <cpu/x86/smm.h>
#include <acpi/acpigen.h>
#include <string.h>
#include "chip.h"
#include "i82801ix.h"
-#include "nvs.h"
#include <southbridge/intel/common/pciehp.h>
#include <southbridge/intel/common/pmutil.h>
#include <southbridge/intel/common/acpi_pirq_gen.h>
@@ -452,17 +450,6 @@ static void i82801ix_lpc_read_resources(struct device *dev)
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}
-size_t gnvs_size_of_array(void)
-{
- return sizeof(struct global_nvs);
-}
-
-/* To build emulation/qemu-q35 with CHROMEOS. */
-void *gnvs_chromeos_ptr(struct global_nvs *gnvs)
-{
- return 0;
-}
-
static const char *lpc_acpi_name(const struct device *dev)
{
return "LPCB";