diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-07-03 01:02:28 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-20 17:04:46 +0000 |
| commit | b21bffae0ce5dee5d316ad544ccc6dedbc4475a1 (patch) | |
| tree | 5affe6f49cf0c7b7cb5b95d6cd5dd928d624dd8b /src/southbridge/intel/i82801ix/i82801ix.h | |
| parent | 65e5b100e2133a305ba1f471a23d75dc37a2224d (diff) | |
sb/intel: Define CONFIG_FIXED_SMBUS_IO_BASE
Make it default to 0x400, which is what the touched southbridges use.
Change-Id: I95cb1730d5bf6f596ed1ca8e7dba40b6a9e882fe
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43037
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge/intel/i82801ix/i82801ix.h')
| -rw-r--r-- | src/southbridge/intel/i82801ix/i82801ix.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/southbridge/intel/i82801ix/i82801ix.h b/src/southbridge/intel/i82801ix/i82801ix.h index 08b94c7056..ff94809cfb 100644 --- a/src/southbridge/intel/i82801ix/i82801ix.h +++ b/src/southbridge/intel/i82801ix/i82801ix.h @@ -80,8 +80,6 @@ #define D28Fx_SLCAP 0x54 -#define SMBUS_IO_BASE 0x0400 - /* PCI Configuration Space (D31:F3): SMBus */ #define SMB_BASE 0x20 #define HOSTC 0x40 |