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authorAngel Pons <th3fanbus@gmail.com>2020-08-10 13:39:25 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-08-12 10:56:02 +0000
commit28d10a23849f86d48bac2b860a6a72c9f3d88c10 (patch)
treefccf330857e5bc5b3477a59744c92f866662a2ea /src/southbridge/intel/i82801ix/early_init.c
parent05a8c0aa690c6d66c09ef7dd891998cab492bdc0 (diff)
sb/intel/i82801ix: Use macros for LPC_EN
Taken directly from i82801jx code. Tested with BUILD_TIMELESS=1, Roda RK9 does not change. Change-Id: I0a5dc274e0058144e6e7f734c848b6b5962cba85 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44333 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel/i82801ix/early_init.c')
-rw-r--r--src/southbridge/intel/i82801ix/early_init.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82801ix/early_init.c b/src/southbridge/intel/i82801ix/early_init.c
index 105471276d..3c0f3aeff4 100644
--- a/src/southbridge/intel/i82801ix/early_init.c
+++ b/src/southbridge/intel/i82801ix/early_init.c
@@ -27,7 +27,10 @@ void i82801ix_lpc_setup(void)
* - 0x200-0x207 GAMEL
*/
pci_write_config16(d31f0, D31F0_LPC_IODEC, 0x0010);
- pci_write_config16(d31f0, D31F0_LPC_EN, 0x3f0f);
+ pci_write_config16(d31f0, D31F0_LPC_EN, CNF2_LPC_EN | CNF1_LPC_EN
+ | MC_LPC_EN | KBC_LPC_EN | GAMEH_LPC_EN
+ | GAMEL_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
+ | COMB_LPC_EN | COMA_LPC_EN);
/* Set up generic decode ranges */
if (!dev || !dev->chip_info)