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authorStefan Tauner <stefan.tauner@gmx.at>2018-08-11 18:45:28 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-08-14 16:05:17 +0000
commitcea31ea5eb9b634019afb3d9531aeef38dd226ba (patch)
tree0922f6194dadca2329e5307a7238d2589c753355 /src/southbridge/intel/i82801ix/dmi_setup.c
parent75b1f768d8eef24769ae9b559f66b3561d24b010 (diff)
sb/intel/i82801[ij]x: use (more) RCBA register names instead of magic numbers
Change-Id: I909d7dd4968aa2f76df00c03e603e8e82a4824c0 Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: https://review.coreboot.org/28052 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/i82801ix/dmi_setup.c')
-rw-r--r--src/southbridge/intel/i82801ix/dmi_setup.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/src/southbridge/intel/i82801ix/dmi_setup.c b/src/southbridge/intel/i82801ix/dmi_setup.c
index e47586b1ed..24fe347423 100644
--- a/src/southbridge/intel/i82801ix/dmi_setup.c
+++ b/src/southbridge/intel/i82801ix/dmi_setup.c
@@ -46,11 +46,12 @@ void i82801ix_dmi_setup(void)
RCBA32(RCBA_V1CAP) = (RCBA32(RCBA_V1CAP) & ~(0x7f<<16)) | (0x12<<16);
- RCBA32(0x0088) = 0x00109000;
- RCBA16(0x01fc) = 0x060b;
- RCBA32(0x01f4) = 0x86000040;
- RCBA8 (0x0220) = 0x45;
- RCBA32(0x2024) &= ~(1 << 7);
+ /* NB: other CIRs are handled in i82801ix_early_settings(). */
+ RCBA32(RCBA_CIR1) = 0x00109000;
+ RCBA16(RCBA_CIR3) = 0x060b;
+ RCBA32(RCBA_CIR2) = 0x86000040;
+ RCBA8(RCBA_BCR) = 0x45;
+ RCBA32(RCBA_CIR6) &= ~(1 << 7);
/* VC1 setup for isochronous transfers: */