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authorElyes Haouas <ehaouas@noos.fr>2023-09-09 10:18:03 +0200
committerFelix Singer <service+coreboot-gerrit@felixsinger.de>2024-01-15 19:30:15 +0000
commita7f55af995040045875515857d095c021984f7f2 (patch)
treeedfeec52bbb0c70c8d0de87928245ee9af7f5c82 /src/southbridge/intel/i82801ix/chip.h
parent550f55e4f63dcb6d16132d2f5596e653fe2d1579 (diff)
sb/intel/i82801{i,j}x/chip.h: Use boolean where appropriate
Change-Id: I867451ae3d6d37033c9e0e57a4d7fd4a06dedbef Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77738 Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Diffstat (limited to 'src/southbridge/intel/i82801ix/chip.h')
-rw-r--r--src/southbridge/intel/i82801ix/chip.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/southbridge/intel/i82801ix/chip.h b/src/southbridge/intel/i82801ix/chip.h
index d52a0c2006..33f9713368 100644
--- a/src/southbridge/intel/i82801ix/chip.h
+++ b/src/southbridge/intel/i82801ix/chip.h
@@ -56,12 +56,12 @@ struct southbridge_intel_i82801ix_config {
/* IDE configuration */
uint8_t sata_port_map : 6;
- unsigned int sata_clock_request : 1;
- unsigned int sata_traffic_monitor : 1;
+ bool sata_clock_request;
+ bool sata_traffic_monitor;
- unsigned int c4onc3_enable:1;
- unsigned int c5_enable : 1;
- unsigned int c6_enable : 1;
+ bool c4onc3_enable;
+ bool c5_enable;
+ bool c6_enable;
unsigned int throttle_duty : 3;