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authorAngel Pons <th3fanbus@gmail.com>2020-10-25 13:54:38 +0100
committerAngel Pons <th3fanbus@gmail.com>2020-11-04 22:58:40 +0000
commita42d37ac3f8bf5ffdfa7f2d3416d35769b65dc3b (patch)
tree471c062517a84642927a4a570969b67e2bf41eb3 /src/southbridge/intel/i82801ix/acpi
parent9f8e92bae32129883bc1e16ef40915963bf4b17b (diff)
sb/intel/*/acpi/lpc.asl: Drop unnecessary RCBA offset
Nothing should be using this offset. Change-Id: Ia4736471e2ac53bec18bfe073f4aa49e3fc524a8 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46765 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801ix/acpi')
-rw-r--r--src/southbridge/intel/i82801ix/acpi/lpc.asl5
1 files changed, 0 insertions, 5 deletions
diff --git a/src/southbridge/intel/i82801ix/acpi/lpc.asl b/src/southbridge/intel/i82801ix/acpi/lpc.asl
index b93fa96d23..c351c531ad 100644
--- a/src/southbridge/intel/i82801ix/acpi/lpc.asl
+++ b/src/southbridge/intel/i82801ix/acpi/lpc.asl
@@ -25,11 +25,6 @@ Device (LPCB)
Offset (0x80), // IO Decode Ranges
IOD0, 8,
IOD1, 8,
-
- Offset (0xf0), // RCBA
- RCEN, 1,
- , 13,
- RCBA, 18,
}
#include <southbridge/intel/common/acpi/irqlinks.asl>