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authorDave Frodin <dave.frodin@se-eng.com>2014-06-05 14:30:22 -0600
committerDave Frodin <dave.frodin@se-eng.com>2014-06-11 20:06:21 +0200
commitac1b875b554f45b0c98d375369119495b7ad2a2a (patch)
treecb397c9fe4972193e4b95808c37cfc267f160401 /src/southbridge/intel/i82801gx
parent61f902d4a7779d0ce30de79df7a71ad0c3788887 (diff)
amd/southbridge/lpc: SPI BAR has fixed size/location
The CIMX sb700/sb800/sb900 and agesa/hudson code was treating the LPC SPI BAR as a normal PCI BAR. This will set the resources for a fixed size at a fixed address. This was tested on hp/abm, amd/persimmon, and gizmosphere/gizmo boards. Change-Id: I1367efe0bbb53b7727258585963f61f4bd02ea1d Signed-off-by: Dave Frodin <dave.frodin@se-eng.com> Reviewed-on: http://review.coreboot.org/5947 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/intel/i82801gx')
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