summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/i82801gx
diff options
context:
space:
mode:
authorMartin Roth <martinroth@google.com>2016-01-05 20:58:58 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2016-01-07 22:57:02 +0100
commit2ed0aa258f4bcbf978998ccd3a76f7b1c2d3d031 (patch)
tree3bb7459dcae2b0fa15ed409b1f7d3fb5f77af127 /src/southbridge/intel/i82801gx
parent2e0d9447db22183e2d3393d84e221e8bb1613d45 (diff)
Correct some common spelling mistakes
- occured -> occurred - accomodate -> accommodate - existant -> existent - asssertion -> assertion - manangement -> management - cotroller -> controller Change-Id: Ibd6663752466d691fabbdc216ea05f2b58ac12d1 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/12850 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801gx')
-rw-r--r--src/southbridge/intel/i82801gx/lpc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index 4e9711cb22..03df1a3a08 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -42,7 +42,7 @@
typedef struct southbridge_intel_i82801gx_config config_t;
/**
- * Set miscellanous static southbridge features.
+ * Set miscellaneous static southbridge features.
*
* @param dev PCI device with I/O APIC control registers
*/
@@ -200,7 +200,7 @@ static void i82801gx_power_options(device_t dev)
}
reg8 |= (3 << 4); /* avoid #S4 assertions */
- reg8 &= ~(1 << 3); /* minimum asssertion is 1 to 2 RTCCLK */
+ reg8 &= ~(1 << 3); /* minimum assertion is 1 to 2 RTCCLK */
pci_write_config8(dev, GEN_PMCON_3, reg8);
printk(BIOS_INFO, "Set power %s after power failure.\n", state);