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authorPatrick Rudolph <siro@das-labor.org>2016-02-06 18:12:28 +0100
committerMartin Roth <martinroth@google.com>2016-02-23 00:28:26 +0100
commit10104685c50d05353318932f183864f3fca37489 (patch)
tree072dbb9e7ca8ccf32a78adb7827f7a4b8fdfb893 /src/southbridge/intel/i82801gx
parent273a8dca1f7896c73b812ecc2c6cd2572ac51d6a (diff)
southbridge/intel/ibexpeak: Use common gpio.c
Use shared gpio code from common folder. Remove the now unused bd82x6x/gpio.c. Needs test on real hardware ! Change-Id: Ibb54c03fd83a529d1ceccfb2c33190e7d42224d8 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/13616 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/intel/i82801gx')
-rw-r--r--src/southbridge/intel/i82801gx/i82801gx.h10
1 files changed, 0 insertions, 10 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h
index 35297c764a..17b7026733 100644
--- a/src/southbridge/intel/i82801gx/i82801gx.h
+++ b/src/southbridge/intel/i82801gx/i82801gx.h
@@ -302,16 +302,6 @@ int southbridge_detect_s3_resume(void);
#define FD_SATA (1 << 2)
#define FD_PATA (1 << 1)
-/* ICH7 GPIOBASE */
-#define GPIO_USE_SEL 0x00
-#define GP_IO_SEL 0x04
-#define GP_LVL 0x0c
-#define GPO_BLINK 0x18
-#define GPI_INV 0x2c
-#define GPIO_USE_SEL2 0x30
-#define GP_IO_SEL2 0x34
-#define GP_LVL2 0x38
-
/* ICH7 PMBASE */
#define PM1_STS 0x00
#define WAK_STS (1 << 15)