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| author | Kun Liu <liukun11@huaqin.corp-partner.google.com> | 2023-11-30 18:05:03 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-12-19 13:35:44 +0000 |
| commit | f733703a61d291ec300a233bed03c27d53ae6b1f (patch) | |
| tree | 2bd26e5ea693db8a9b5a0f81eab3a0d783fa94c6 /src/southbridge/intel/i82801gx | |
| parent | b8fd150da64a54f33971a0a524ec4364eadbce12 (diff) | |
mb/google/rex/var/screebo: Add delay 1ms after Main 3V3
when S0ix returns S0, PERST needs to delay until
Main 3V3 is stable and then pull up
BUG=b:313976507
TEST=emerge-rex coreboot,measurement waveform verify pass
Change-Id: I33a86e52fab3c5c8cba6ebed0cbdd1b88b6538b0
Signed-off-by: Kun Liu <liukun11@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79320
Reviewed-by: Rui Zhou <zhourui@huaqin.corp-partner.google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801gx')
0 files changed, 0 insertions, 0 deletions