diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-05-13 12:47:28 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-05-22 07:22:01 +0000 |
commit | 996670377666eac27af4c4562d48677305e4e937 (patch) | |
tree | f70c430db822c42e9d44686836ec8937503b4aee /src/southbridge/intel/i82801gx | |
parent | cbcdb3e754a2d1c68928725d37ccf1621d936a74 (diff) |
sb/intel/i82801gx: Get rid of device_t
Use of device_t has been abandoned in ramstage.
Change-Id: Iccddf3140fd94c2e5a246fe2839573f5dd387147
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26245
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/i82801gx')
-rw-r--r-- | src/southbridge/intel/i82801gx/ac97.c | 4 | ||||
-rw-r--r-- | src/southbridge/intel/i82801gx/azalia.c | 4 | ||||
-rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx.h | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82801gx/ide.c | 4 | ||||
-rw-r--r-- | src/southbridge/intel/i82801gx/lpc.c | 20 | ||||
-rw-r--r-- | src/southbridge/intel/i82801gx/pci.c | 4 | ||||
-rw-r--r-- | src/southbridge/intel/i82801gx/pcie.c | 4 | ||||
-rw-r--r-- | src/southbridge/intel/i82801gx/sata.c | 4 | ||||
-rw-r--r-- | src/southbridge/intel/i82801gx/smbus.c | 14 | ||||
-rw-r--r-- | src/southbridge/intel/i82801gx/usb.c | 4 | ||||
-rw-r--r-- | src/southbridge/intel/i82801gx/usb_ehci.c | 4 | ||||
-rw-r--r-- | src/southbridge/intel/i82801gx/watchdog.c | 2 |
13 files changed, 37 insertions, 35 deletions
diff --git a/src/southbridge/intel/i82801gx/ac97.c b/src/southbridge/intel/i82801gx/ac97.c index b86891bddf..9bf9456729 100644 --- a/src/southbridge/intel/i82801gx/ac97.c +++ b/src/southbridge/intel/i82801gx/ac97.c @@ -246,8 +246,8 @@ static void ac97_modem_init(struct device *dev) } } -static void ac97_set_subsystem(device_t dev, unsigned int vendor, - unsigned int device) +static void ac97_set_subsystem(struct device *dev, unsigned int vendor, + unsigned int device) { if (!vendor || !device) { pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, diff --git a/src/southbridge/intel/i82801gx/azalia.c b/src/southbridge/intel/i82801gx/azalia.c index 01c11965fa..f1866a5116 100644 --- a/src/southbridge/intel/i82801gx/azalia.c +++ b/src/southbridge/intel/i82801gx/azalia.c @@ -303,8 +303,8 @@ static void azalia_init(struct device *dev) } } -static void azalia_set_subsystem(device_t dev, unsigned int vendor, - unsigned int device) +static void azalia_set_subsystem(struct device *dev, unsigned int vendor, + unsigned int device) { if (!vendor || !device) { pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, diff --git a/src/southbridge/intel/i82801gx/i82801gx.c b/src/southbridge/intel/i82801gx/i82801gx.c index aab674b6a0..eb0583feed 100644 --- a/src/southbridge/intel/i82801gx/i82801gx.c +++ b/src/southbridge/intel/i82801gx/i82801gx.c @@ -20,7 +20,7 @@ #include "i82801gx.h" #include "sata.h" -void i82801gx_enable(device_t dev) +void i82801gx_enable(struct device *dev) { u32 reg32; diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h index df744fc73c..1038bafdab 100644 --- a/src/southbridge/intel/i82801gx/i82801gx.h +++ b/src/southbridge/intel/i82801gx/i82801gx.h @@ -44,7 +44,7 @@ #if !defined(__PRE_RAM__) #include "chip.h" #if !defined(__SIMPLE_DEVICE__) -void i82801gx_enable(device_t dev); +void i82801gx_enable(struct device *dev); #endif void gpi_route_interrupt(u8 gpi, u8 mode); #else diff --git a/src/southbridge/intel/i82801gx/ide.c b/src/southbridge/intel/i82801gx/ide.c index e1353365b6..97092726fa 100644 --- a/src/southbridge/intel/i82801gx/ide.c +++ b/src/southbridge/intel/i82801gx/ide.c @@ -91,8 +91,8 @@ static void ide_init(struct device *dev) printk(BIOS_DEBUG, "\n"); } -static void ide_set_subsystem(device_t dev, unsigned int vendor, - unsigned int device) +static void ide_set_subsystem(struct device *dev, unsigned int vendor, + unsigned int device) { if (!vendor || !device) { pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index a26b9f8a8e..ab426ab86c 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -88,9 +88,9 @@ static void i82801gx_enable_serial_irqs(struct device *dev) * 0x80 - The PIRQ is not routed. */ -static void i82801gx_pirq_init(device_t dev) +static void i82801gx_pirq_init(struct device *dev) { - device_t irq_dev; + struct device *irq_dev; /* Get the chip configuration */ config_t *config = dev->chip_info; @@ -134,7 +134,7 @@ static void i82801gx_pirq_init(device_t dev) } } -static void i82801gx_gpi_routing(device_t dev) +static void i82801gx_gpi_routing(struct device *dev) { /* Get the chip configuration */ config_t *config = dev->chip_info; @@ -163,7 +163,7 @@ static void i82801gx_gpi_routing(device_t dev) pci_write_config32(dev, GPIO_ROUT, reg32); } -static void i82801gx_power_options(device_t dev) +static void i82801gx_power_options(struct device *dev) { u8 reg8; u16 reg16, pmbase; @@ -267,7 +267,7 @@ static void i82801gx_power_options(device_t dev) outl(reg32, pmbase + 0x04); } -static void i82801gx_configure_cstates(device_t dev) +static void i82801gx_configure_cstates(struct device *dev) { u8 reg8; @@ -487,7 +487,7 @@ unsigned long acpi_fill_madt(unsigned long current) void acpi_fill_fadt(acpi_fadt_t *fadt) { - device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0)); + struct device *dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0)); config_t *chip = dev->chip_info; u16 pmbase = pci_read_config16(dev, 0x40) & 0xfffe; @@ -603,7 +603,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->flags |= ACPI_FADT_DOCKING_SUPPORTED; } -static void i82801gx_lpc_read_resources(device_t dev) +static void i82801gx_lpc_read_resources(struct device *dev) { struct resource *res; u8 io_index = 0; @@ -645,8 +645,8 @@ static void i82801gx_lpc_read_resources(device_t dev) } } -static void set_subsystem(device_t dev, unsigned int vendor, - unsigned int device) +static void set_subsystem(struct device *dev, unsigned int vendor, + unsigned int device) { if (!vendor || !device) { pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, @@ -657,7 +657,7 @@ static void set_subsystem(device_t dev, unsigned int vendor, } } -static void southbridge_inject_dsdt(device_t dev) +static void southbridge_inject_dsdt(struct device *dev) { global_nvs_t *gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs)); diff --git a/src/southbridge/intel/i82801gx/pci.c b/src/southbridge/intel/i82801gx/pci.c index 1635dfedf8..97ae98abdf 100644 --- a/src/southbridge/intel/i82801gx/pci.c +++ b/src/southbridge/intel/i82801gx/pci.c @@ -97,8 +97,8 @@ static void ich_pci_bus_enable_resources(struct device *dev) ich_pci_dev_enable_resources(dev); } -static void set_subsystem(device_t dev, unsigned int vendor, - unsigned int device) +static void set_subsystem(struct device *dev, unsigned int vendor, + unsigned int device) { /* NOTE: This is not the default position! */ if (!vendor || !device) { diff --git a/src/southbridge/intel/i82801gx/pcie.c b/src/southbridge/intel/i82801gx/pcie.c index 0d14ff47ce..7de98908bf 100644 --- a/src/southbridge/intel/i82801gx/pcie.c +++ b/src/southbridge/intel/i82801gx/pcie.c @@ -89,8 +89,8 @@ static void pci_init(struct device *dev) pci_write_config16(dev, 0x1e, reg16); } -static void pcie_set_subsystem(device_t dev, unsigned int vendor, - unsigned int device) +static void pcie_set_subsystem(struct device *dev, unsigned int vendor, + unsigned int device) { /* NOTE: This is not the default position! */ if (!vendor || !device) { diff --git a/src/southbridge/intel/i82801gx/sata.c b/src/southbridge/intel/i82801gx/sata.c index a08f266bbe..588d68701c 100644 --- a/src/southbridge/intel/i82801gx/sata.c +++ b/src/southbridge/intel/i82801gx/sata.c @@ -199,8 +199,8 @@ static void sata_init(struct device *dev) pci_write_config32(dev, SATA_IR, reg32); } -static void sata_set_subsystem(device_t dev, unsigned int vendor, - unsigned int device) +static void sata_set_subsystem(struct device *dev, unsigned int vendor, + unsigned int device) { if (!vendor || !device) { pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, diff --git a/src/southbridge/intel/i82801gx/smbus.c b/src/southbridge/intel/i82801gx/smbus.c index fdf76a03e5..72f78ea9f7 100644 --- a/src/southbridge/intel/i82801gx/smbus.c +++ b/src/southbridge/intel/i82801gx/smbus.c @@ -25,7 +25,7 @@ #include <southbridge/intel/common/smbus.h> #include "i82801gx.h" -static int lsmbus_read_byte(device_t dev, u8 address) +static int lsmbus_read_byte(struct device *dev, u8 address) { u16 device; struct resource *res; @@ -38,7 +38,7 @@ static int lsmbus_read_byte(device_t dev, u8 address) return do_smbus_read_byte(res->base, device, address); } -static int lsmbus_write_byte(device_t dev, u8 address, u8 data) +static int lsmbus_write_byte(struct device *dev, u8 address, u8 data) { u16 device; struct resource *res; @@ -50,7 +50,8 @@ static int lsmbus_write_byte(device_t dev, u8 address, u8 data) return do_smbus_write_byte(res->base, device, address, data); } -static int lsmbus_block_write(device_t dev, u8 cmd, u8 bytes, const u8 *buf) +static int lsmbus_block_write(struct device *dev, u8 cmd, u8 bytes, + const u8 *buf) { u16 device; struct resource *res; @@ -62,7 +63,7 @@ static int lsmbus_block_write(device_t dev, u8 cmd, u8 bytes, const u8 *buf) return do_smbus_block_write(res->base, device, cmd, bytes, buf); } -static int lsmbus_block_read(device_t dev, u8 cmd, u8 bytes, u8 *buf) +static int lsmbus_block_read(struct device *dev, u8 cmd, u8 bytes, u8 *buf) { u16 device; struct resource *res; @@ -82,7 +83,8 @@ static struct smbus_bus_operations lops_smbus_bus = { .block_write = lsmbus_block_write, }; -static void smbus_set_subsystem(device_t dev, unsigned int vendor, unsigned int device) +static void smbus_set_subsystem(struct device *dev, unsigned int vendor, + unsigned int device) { if (!vendor || !device) { pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, @@ -97,7 +99,7 @@ static struct pci_operations smbus_pci_ops = { .set_subsystem = smbus_set_subsystem, }; -static void smbus_read_resources(device_t dev) +static void smbus_read_resources(struct device *dev) { struct resource *res = new_resource(dev, PCI_BASE_ADDRESS_4); res->base = SMBUS_IO_BASE; diff --git a/src/southbridge/intel/i82801gx/usb.c b/src/southbridge/intel/i82801gx/usb.c index 2978080f34..eaa2cf19cd 100644 --- a/src/southbridge/intel/i82801gx/usb.c +++ b/src/southbridge/intel/i82801gx/usb.c @@ -42,8 +42,8 @@ static void usb_init(struct device *dev) printk(BIOS_DEBUG, "done.\n"); } -static void usb_set_subsystem(device_t dev, unsigned int vendor, - unsigned int device) +static void usb_set_subsystem(struct device *dev, unsigned int vendor, + unsigned int device) { if (!vendor || !device) { pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, diff --git a/src/southbridge/intel/i82801gx/usb_ehci.c b/src/southbridge/intel/i82801gx/usb_ehci.c index 6ed2dcb9af..b40c83d56d 100644 --- a/src/southbridge/intel/i82801gx/usb_ehci.c +++ b/src/southbridge/intel/i82801gx/usb_ehci.c @@ -58,8 +58,8 @@ static void usb_ehci_init(struct device *dev) printk(BIOS_DEBUG, "done.\n"); } -static void usb_ehci_set_subsystem(device_t dev, unsigned int vendor, - unsigned int device) +static void usb_ehci_set_subsystem(struct device *dev, unsigned int vendor, + unsigned int device) { u8 access_cntl; diff --git a/src/southbridge/intel/i82801gx/watchdog.c b/src/southbridge/intel/i82801gx/watchdog.c index 9365e89066..ac2de3a66c 100644 --- a/src/southbridge/intel/i82801gx/watchdog.c +++ b/src/southbridge/intel/i82801gx/watchdog.c @@ -22,7 +22,7 @@ void watchdog_off(void) { - device_t dev; + struct device *dev; unsigned long value, base; /* Turn off the ICH7 watchdog. */ |