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authorAngel Pons <th3fanbus@gmail.com>2020-11-04 00:38:28 +0100
committerAngel Pons <th3fanbus@gmail.com>2020-11-07 14:18:35 +0000
commitf47117134d0b19914eb266af2f4f8094ca7621e6 (patch)
tree00a08d32f37c6b2a7bd58d375268396646c46a0c /src/southbridge/intel/i82801gx
parent4b519f7c62d55b06c1d99ee6b39a0226475777ad (diff)
sb/intel: Don't set ACPI_EN twice
It is already done once when enabling PMBASE in early init. Change-Id: I14289c9164ee1488c192fce721d86c89fa5cc736 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47207 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge/intel/i82801gx')
-rw-r--r--src/southbridge/intel/i82801gx/lpc.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index 721735cb15..9ac894254c 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -35,9 +35,6 @@
*/
static void i82801gx_enable_ioapic(struct device *dev)
{
- /* Enable ACPI I/O range decode */
- pci_write_config8(dev, ACPI_CNTL, ACPI_EN);
-
set_ioapic_id(VIO_APIC_VADDR, 0x02);
/*