diff options
| author | Martin Roth <martinroth@google.com> | 2017-10-10 10:34:48 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-10-11 17:53:09 +0000 |
| commit | 6754e4ea2008f67c0630fdac976456649a5ac95a (patch) | |
| tree | 3be8ac23a26309982dd4aba96128130264a4aee6 /src/southbridge/intel/i82801gx/pcie.c | |
| parent | 0c8237aa0de9bd2c4a062b11f1f5dea414c2a845 (diff) | |
mainboard/google/kahlee: Add EC_IN_RW flag
Depthcharge was complaining that the GPIO for this flag wasn't set.
The GPIO also needs to be an input, not an output.
BUG=b:67614692
TEST=Depthcharge no longer complains that there is no GPIO set for flag5.
The system boots again.
Change-Id: Ib854e97b0a3aa42a95ceb8a42a9776f0345ff8b1
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/21936
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Diffstat (limited to 'src/southbridge/intel/i82801gx/pcie.c')
0 files changed, 0 insertions, 0 deletions