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authorStefan Reinauer <stepan@coresystems.de>2010-02-22 06:09:43 +0000
committerStefan Reinauer <stepan@openbios.org>2010-02-22 06:09:43 +0000
commitde3206a7bebce99f11e753164cc4d46357bba96a (patch)
tree9843d883940e372dd357b1357ecd7eaba3e3365f /src/southbridge/intel/i82801gx/i82801gx.h
parentd650e9934ff8da9b9cb69e42e642c0ee6d390bf6 (diff)
This is a general cleanup patch
- drop include/part and move files to include/ - get rid lots of warnings - make resource allocator happy with w83627thg - trivial cbmem resume fix - fix payload and log level settings in abuild - fix kontron mptable for virtual wire mode - drop some dead includes and dead code. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5136 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801gx/i82801gx.h')
-rw-r--r--src/southbridge/intel/i82801gx/i82801gx.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h
index 1f320c5182..3ae440d568 100644
--- a/src/southbridge/intel/i82801gx/i82801gx.h
+++ b/src/southbridge/intel/i82801gx/i82801gx.h
@@ -47,6 +47,24 @@
extern void i82801gx_enable(device_t dev);
#endif
+#define MAINBOARD_POWER_OFF 0
+#define MAINBOARD_POWER_ON 1
+#define MAINBOARD_POWER_KEEP 2
+
+#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
+#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON
+#endif
+
+/* PCI Configuration Space (D30:F0): PCI2PCI */
+#define PSTS 0x06
+#define SMLT 0x1b
+#define SECSTS 0x1e
+#define INTR 0x3c
+#define BCTRL 0x3e
+#define SBR (1 << 6)
+#define SEE (1 << 1)
+#define PERE (1 << 0)
+
/* PCI Configuration Space (D31:F0): LPC */
#define SERIRQ_CNTL 0x64