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authorArthur Heymans <arthur@aheymans.xyz>2018-04-10 12:56:19 +0200
committerArthur Heymans <arthur@aheymans.xyz>2018-11-27 12:09:53 +0000
commit31312b21d147938cb4d88ed90e570ac7804c930d (patch)
tree57a714d7939d23838e990686b089f9364dc049ef /src/southbridge/intel/i82801gx/Kconfig
parent516f06e0fb7e4ba4e9ae6c024ab36a079b7cbb76 (diff)
sb/intel/i82801gx: Use common Intel SMM code
Use the common Intel code to set up smm and the smihandler. This is expected to break S3 resume and other smihandler related functionality as this code is meant to be used with CONFIG_SMM_TSEG. Platforms (i945, pineview, x4x) using this southbridge will adapt the CONFIG_SMM_TSEG codepath in subsequent patches. Tested on Intel D945GCLF, still boots fine but breaks S3 resume support because it hangs on SMI. Change-Id: If7016a3b98fc5f14c287ce800325084f9dc602a0 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/25594 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/i82801gx/Kconfig')
-rw-r--r--src/southbridge/intel/i82801gx/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig
index 28d42ffbe9..d4615faf7d 100644
--- a/src/southbridge/intel/i82801gx/Kconfig
+++ b/src/southbridge/intel/i82801gx/Kconfig
@@ -28,6 +28,7 @@ config SOUTHBRIDGE_INTEL_I82801GX
select HAVE_INTEL_CHIPSET_LOCKDOWN
select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
select INTEL_HAS_TOP_SWAP
+ select SOUTHBRIDGE_INTEL_COMMON_SMM
if SOUTHBRIDGE_INTEL_I82801GX