summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/i82801ex
diff options
context:
space:
mode:
authorStefan Reinauer <stepan@coresystems.de>2010-03-17 17:50:48 +0000
committerStefan Reinauer <stepan@openbios.org>2010-03-17 17:50:48 +0000
commit07190470053f1e4f937a0d0d100859c452c00fbc (patch)
treea2c8e16119c4b1e365d419af78632dadebbc660f /src/southbridge/intel/i82801ex
parent50776fab1c9062ddfa353ee6c138f69d901c11b7 (diff)
fix HPET on some ICH southbridges
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5252 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801ex')
-rw-r--r--src/southbridge/intel/i82801ex/i82801ex_lpc.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801ex/i82801ex_lpc.c b/src/southbridge/intel/i82801ex/i82801ex_lpc.c
index a8b48ae454..b9d19074a4 100644
--- a/src/southbridge/intel/i82801ex/i82801ex_lpc.c
+++ b/src/southbridge/intel/i82801ex/i82801ex_lpc.c
@@ -231,6 +231,7 @@ static void enable_hpet(struct device *dev)
dword &= ~(3 << 15); /* clear it */
dword |= (code<<15);
+ pci_write_config32(dev, GEN_CNTL, dword);
printk_debug("enabling HPET @0x%lx\n", hpet_address | (code <<12) );
}