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authorStefan Reinauer <stepan@coresystems.de>2010-08-01 15:41:14 +0000
committerStefan Reinauer <stepan@openbios.org>2010-08-01 15:41:14 +0000
commitbc0f7a68df9c07518eb34ef4549a2f704ededcdd (patch)
tree586e2cc67607b67de202f905fc28c667a05212a3 /src/southbridge/intel/i82801dx
parent2d33dc40965c6f7f3dae585a330c2cd06b816c85 (diff)
- fix SMM code relocation race
- make SMM relocation debugging Kconfig accessible Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5676 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801dx')
-rw-r--r--src/southbridge/intel/i82801dx/i82801dx.h1
-rw-r--r--src/southbridge/intel/i82801dx/i82801dx_smi.c8
2 files changed, 6 insertions, 3 deletions
diff --git a/src/southbridge/intel/i82801dx/i82801dx.h b/src/southbridge/intel/i82801dx/i82801dx.h
index 1b995b1204..cbdbc963af 100644
--- a/src/southbridge/intel/i82801dx/i82801dx.h
+++ b/src/southbridge/intel/i82801dx/i82801dx.h
@@ -86,6 +86,7 @@ extern void i82801dx_enable(device_t dev);
#define PCICMD 0x04
#define PMBASE 0x40
#define PMBASE_ADDR 0x0400
+#define DEFAULT_PMBASE PMBASE_ADDR
#define ACPI_CNTL 0x44
#define BIOS_CNTL 0x4E
#define GPIO_BASE 0x58
diff --git a/src/southbridge/intel/i82801dx/i82801dx_smi.c b/src/southbridge/intel/i82801dx/i82801dx_smi.c
index e63fb501f2..55d8a70965 100644
--- a/src/southbridge/intel/i82801dx/i82801dx_smi.c
+++ b/src/southbridge/intel/i82801dx/i82801dx_smi.c
@@ -335,11 +335,13 @@ static void smm_install(void)
void smm_init(void)
{
- // FIXME is this a race condition?
- smm_relocate();
+ /* Put SMM code to 0xa0000 */
smm_install();
- // We're done. Make sure SMIs can happen!
+ /* Put relocation code to 0x38000 and relocate SMBASE */
+ smm_relocate();
+
+ /* We're done. Make sure SMIs can happen! */
smi_set_eos();
}