diff options
| author | Patrick Georgi <patrick@georgi-clan.de> | 2012-10-05 21:54:38 +0200 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2012-10-08 21:23:08 +0200 |
| commit | 9aeb69447d3839675b2cac51c3e95a4724fd9b0d (patch) | |
| tree | d9b1cc7483a51ab340d6d9fae78a30e562f99767 /src/southbridge/intel/i82801dx | |
| parent | ec2c18ee6068ef6adf6f5be437d7047c91773654 (diff) | |
hpet: common ACPI generation
HPET's min ticks (minimum time between events to avoid
losing interrupts) is chipset specific, so move it to
Kconfig.
Via also has a special base address, so move it as well.
Apart from these (and the base address was already #defined),
the table is very uniform.
Change-Id: I848a2e2b0b16021c7ee5ba99097fa6a5886c3286
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1562
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Diffstat (limited to 'src/southbridge/intel/i82801dx')
| -rw-r--r-- | src/southbridge/intel/i82801dx/i82801dx.h | 9 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801dx/lpc.c | 6 |
2 files changed, 3 insertions, 12 deletions
diff --git a/src/southbridge/intel/i82801dx/i82801dx.h b/src/southbridge/intel/i82801dx/i82801dx.h index 4da430a395..d9e4d3809d 100644 --- a/src/southbridge/intel/i82801dx/i82801dx.h +++ b/src/southbridge/intel/i82801dx/i82801dx.h @@ -41,15 +41,6 @@ int smbus_read_byte(unsigned device, unsigned address); #endif #endif -/* - * HPET Memory Address Range. Possible values: - * 0xfed00000 for FED0_0000h - FED0_03FFh - * 0xfed01000 for FED0_1000h - FED0_13FFh - * 0xfed02000 for FED0_2000h - FED0_23FFh - * 0xfed03000 for FED0_3000h - FED0_33FFh - */ -#define HPET_ADDR 0xfed00000 - #define DEBUG_PERIODIC_SMIS 0 #define MAINBOARD_POWER_OFF 0 diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c index 768e70096b..fbf8e12228 100644 --- a/src/southbridge/intel/i82801dx/lpc.c +++ b/src/southbridge/intel/i82801dx/lpc.c @@ -233,7 +233,7 @@ static void enable_hpet(struct device *dev) u32 reg32, hpet, val; /* Set HPET base address and enable it */ - printk(BIOS_DEBUG, "Enabling HPET at 0x%x\n", HPET_ADDR); + printk(BIOS_DEBUG, "Enabling HPET at 0x%x\n", CONFIG_HPET_ADDRESS); reg32 = pci_read_config32(dev, GEN_CNTL); /* * Bit 17 is HPET enable bit. @@ -241,7 +241,7 @@ static void enable_hpet(struct device *dev) */ reg32 &= ~(3 << 15); /* Clear it */ - hpet = HPET_ADDR >> 12; + hpet = CONFIG_HPET_ADDRESS >> 12; hpet &= 0x3; reg32 |= (hpet << 15); @@ -254,7 +254,7 @@ static void enable_hpet(struct device *dev) val &= 0x7; if ((val & 0x4) && (hpet == (val & 0x3))) { - printk(BIOS_INFO, "HPET enabled at 0x%x\n", HPET_ADDR); + printk(BIOS_INFO, "HPET enabled at 0x%x\n", CONFIG_HPET_ADDRESS); } else { printk(BIOS_WARNING, "HPET was not enabled correctly\n"); reg32 &= ~(1 << 17); /* Clear Enable */ |