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authorElyes HAOUAS <ehaouas@noos.fr>2021-02-07 20:54:53 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-02-09 07:48:24 +0000
commitdc41371ce63fb60e29fc75a89a796134a125dee2 (patch)
tree79893175b1e4b23de7303c0ccd2cd8f18350e9cb /src/southbridge/intel/i82801dx/lpc.c
parentb08543a6400db38516c2b424f4838c4cd6b70ca0 (diff)
sb/intel/i82801{dx,ix,jx}/lpc.c: Fix typo in comment
Change-Id: Id7110bb2229e7c8f5f49aae40cfdf50719d0fa25 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50371 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/southbridge/intel/i82801dx/lpc.c')
-rw-r--r--src/southbridge/intel/i82801dx/lpc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c
index f207c11556..2c3d5d56fe 100644
--- a/src/southbridge/intel/i82801dx/lpc.c
+++ b/src/southbridge/intel/i82801dx/lpc.c
@@ -119,7 +119,7 @@ static void i82801dx_power_options(struct device *dev)
state = "undefined";
}
- reg8 &= ~(1 << 3); /* minimum asssertion is 1 to 2 RTCCLK */
+ reg8 &= ~(1 << 3); /* minimum assertion is 1 to 2 RTCCLK */
pci_write_config8(dev, GEN_PMCON_3, reg8);
printk(BIOS_INFO, "Set power %s after power failure.\n", state);