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authorKyösti Mälkki <kyosti.malkki@gmail.com>2022-01-18 04:25:48 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2022-11-28 10:05:28 +0000
commit560c3f5ccfff0fc289bb46f1b1b6c4236817590a (patch)
tree59906cc1926d7e643dd1ec95022c87228560f152 /src/southbridge/intel/i82801dx/lpc.c
parent0c745347d09e08d9cf388600558ea41634e5cbcd (diff)
aopen/dxplplusu: Support SMM_ASEG and SMM_TSEG
Both SMM_ASEG and SMM_TSEG choices work. There is periodic TCO timeout occurring. At least with DEBUG_SMI kernel reports low memory corruption. Change-Id: If20a7092117612a1a9e25eb6ac480e105acd57d7 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61517 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel/i82801dx/lpc.c')
-rw-r--r--src/southbridge/intel/i82801dx/lpc.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c
index c92562aaed..d914335c34 100644
--- a/src/southbridge/intel/i82801dx/lpc.c
+++ b/src/southbridge/intel/i82801dx/lpc.c
@@ -4,6 +4,7 @@
#include <arch/io.h>
#include <arch/ioapic.h>
#include <console/console.h>
+#include <cpu/x86/smm.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
@@ -162,6 +163,15 @@ static void i82801dx_rtc_init(struct device *dev)
pci_write_config8(dev, RTC_CONF, 0x04);
}
+static void i82801dx_set_acpi_mode(struct device *dev)
+{
+ if (!acpi_is_wakeup_s3()) {
+ apm_control(APM_CNT_ACPI_DISABLE);
+ } else {
+ apm_control(APM_CNT_ACPI_ENABLE);
+ }
+}
+
static void i82801dx_lpc_route_dma(struct device *dev, u8 mask)
{
u16 reg16;
@@ -240,6 +250,8 @@ static void lpc_init(struct device *dev)
enable_hpet(dev);
setup_i8259();
+
+ i82801dx_set_acpi_mode(dev);
}
static void i82801dx_lpc_read_resources(struct device *dev)