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authorAaron Durbin <adurbin@chromium.org>2016-07-13 23:24:36 -0500
committerAaron Durbin <adurbin@chromium.org>2016-07-15 08:33:53 +0200
commit671909b891439683d81420fe107025ded4caf88d (patch)
tree0625b28da9a0c3c82844a10442b448bb3e0384ed /src/southbridge/intel/i82801dx/i82801dx.h
parent78c6843a2bf1b056ac8989a30bab90fb0320ed28 (diff)
southbridge/intel/i82801dx: use common Intel ACPI hardware definitions
Transition to using the common Intel ACPI hardware definitions generic ACPI definitions. BUG=chrome-os-partner:54977 Change-Id: I29918fe70b5e511785ed920d8953de3281694be2 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/15678 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/southbridge/intel/i82801dx/i82801dx.h')
-rw-r--r--src/southbridge/intel/i82801dx/i82801dx.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/i82801dx/i82801dx.h b/src/southbridge/intel/i82801dx/i82801dx.h
index 996993d5eb..821ed2ca24 100644
--- a/src/southbridge/intel/i82801dx/i82801dx.h
+++ b/src/southbridge/intel/i82801dx/i82801dx.h
@@ -27,6 +27,8 @@
#ifndef I82801DX_H
#define I82801DX_H
+#include <arch/acpi.h>
+
#if !defined(__ASSEMBLER__)
#if !defined(__PRE_RAM__)
#include "chip.h"
@@ -147,8 +149,6 @@ int smbus_read_byte(unsigned device, unsigned address);
#define GBL_EN (1 << 5)
#define TMROF_EN (1 << 0)
#define PM1_CNT 0x04
-#define SLP_EN (1 << 13)
-#define SLP_TYP (7 << 10)
#define GBL_RLS (1 << 2)
#define BM_RLD (1 << 1)
#define SCI_EN (1 << 0)