diff options
| author | Joseph Smith <joe@settoplinux.org> | 2010-03-22 23:10:53 +0000 |
|---|---|---|
| committer | Joseph Smith <joe@smittys.pointclark.net> | 2010-03-22 23:10:53 +0000 |
| commit | b5466b0251a187b345cac1bb1d174590c1d98cab (patch) | |
| tree | 4761f6fdfbf7ca327a1815c553954b84e2eee2f7 /src/southbridge/intel/i82801dx/i82801dx.h | |
| parent | e799c8b140283eccd2db014a0daacc007a195619 (diff) | |
Fix i82801dx_power_options() so CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL works, and rewrite HPET code.
Signed-off-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5270 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801dx/i82801dx.h')
| -rw-r--r-- | src/southbridge/intel/i82801dx/i82801dx.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801dx/i82801dx.h b/src/southbridge/intel/i82801dx/i82801dx.h index cb062bf1d4..a1c30c290e 100644 --- a/src/southbridge/intel/i82801dx/i82801dx.h +++ b/src/southbridge/intel/i82801dx/i82801dx.h @@ -37,6 +37,14 @@ extern void i82801dx_enable(device_t dev); #endif #define IO_APIC_ADDR 0xfec00000 + +/* + * HPET Memory Address Range. Possible values: + * 0xfed00000 for FED0_0000h - FED0_03FFh + * 0xfed01000 for FED0_1000h - FED0_13FFh + * 0xfed02000 for FED0_2000h - FED0_23FFh + * 0xfed03000 for FED0_3000h - FED0_33FFh + */ #define HPET_ADDR 0xfed00000 #define DEBUG_PERIODIC_SMIS 0 @@ -202,6 +210,10 @@ extern void i82801dx_enable(device_t dev); #define TCOBASE 0x60 /* TCO Base Address Register */ #define TCO1_CNT 0x08 /* TCO1 Control Register */ +#define GEN_PMCON_1 0xa0 +#define GEN_PMCON_2 0xa2 +#define GEN_PMCON_3 0xa4 + /* GEN_PMCON_3 bits */ #define RTC_BATTERY_DEAD (1 << 2) #define RTC_POWER_FAILED (1 << 1) |