diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-08-19 21:40:21 +0200 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-09-21 16:29:35 +0000 |
| commit | 131d9f5190a1e5b6fd5a47fecbe5f7eef002c0ef (patch) | |
| tree | accfc86126dba3bf22fe731689ee791894a3bcaa /src/southbridge/intel/i82801dx/i82801dx.h | |
| parent | b69bbfe1ef52421f0bbe1e632d99dc264660ee02 (diff) | |
src/southbridge: Drop unneeded empty lines
Change-Id: I02aa1e2a9a9061b34b91f832d96123a8595d61b7
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44592
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/southbridge/intel/i82801dx/i82801dx.h')
| -rw-r--r-- | src/southbridge/intel/i82801dx/i82801dx.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/southbridge/intel/i82801dx/i82801dx.h b/src/southbridge/intel/i82801dx/i82801dx.h index d5790ae13b..9864720ad0 100644 --- a/src/southbridge/intel/i82801dx/i82801dx.h +++ b/src/southbridge/intel/i82801dx/i82801dx.h @@ -46,8 +46,6 @@ void aseg_smm_lock(void); /* IDE_TIM bits */ #define IDE_DECODE_ENABLE (1 << 15) - - #define PCI_DMA_CFG 0x90 #define SERIRQ_CNTL 0x64 #define GEN_CNTL 0xd0 @@ -93,7 +91,6 @@ void aseg_smm_lock(void); #define RTC_FAILED (1 <<2) - #define PM1_STS 0x00 #define WAK_STS (1 << 15) #define PCIEXPWAK_STS (1 << 14) |