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authorUwe Hermann <uwe@hermann-uwe.de>2010-10-26 22:46:43 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-10-26 22:46:43 +0000
commitb69cb5a31058c0295f2d810c852cc5b52d77225c (patch)
tree9f462e829279fbc1a892a70898ac2ee9da4c79e1 /src/southbridge/intel/i82801cx/i82801cx.h
parentb907d321a5d0957f5cbb03d8f9c8d0ff0c23523b (diff)
Convert some comments to proper Doxygen syntax.
Also, make them all fit in 80chars/column, fix some whitespace issues and also some typos I noticed. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5993 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801cx/i82801cx.h')
-rw-r--r--src/southbridge/intel/i82801cx/i82801cx.h8
1 files changed, 2 insertions, 6 deletions
diff --git a/src/southbridge/intel/i82801cx/i82801cx.h b/src/southbridge/intel/i82801cx/i82801cx.h
index e0d377a9cd..da518a3660 100644
--- a/src/southbridge/intel/i82801cx/i82801cx.h
+++ b/src/southbridge/intel/i82801cx/i82801cx.h
@@ -32,9 +32,7 @@ void i82801cx_hard_reset(void);
#define RTC_POWER_FAILED (1<<1)
#define SLEEP_AFTER_POWER_FAIL (1<<0)
-/********************************************************************/
-/* IDE Controller */
-/********************************************************************/
+/* IDE controller: */
// PCI Configuration Space (D31:F1)
#define IDE_TIM_PRI 0x40 // IDE timings, primary
@@ -44,9 +42,7 @@ void i82801cx_hard_reset(void);
// IDE_TIM bits
#define IDE_DECODE_ENABLE (1<<15)
-/********************************************************************/
-/* SMBus */
-/********************************************************************/
+/* SMBus: */
// PCI Configuration Space (D31:F3)
#define SMB_BASE 0x20