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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2023-04-12 20:01:46 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2023-04-26 10:51:12 +0000 |
| commit | d48982acacbe87bfe78bf9b748d5a2f3fd3225c0 (patch) | |
| tree | 0dbd78ba13d2c50086c0acc24a7512f9139298a3 /src/southbridge/intel/i82371eb | |
| parent | 9368cf90255daeb53765d442a639f86ee5be1f29 (diff) | |
cpu/intel/speedstep: Separate single SSDT CPU entry
Change-Id: Ibe5d84c8fbff79cc73b01eee0980cbed71ceb506
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74400
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel/i82371eb')
| -rw-r--r-- | src/southbridge/intel/i82371eb/acpi_tables.c | 19 |
1 files changed, 14 insertions, 5 deletions
diff --git a/src/southbridge/intel/i82371eb/acpi_tables.c b/src/southbridge/intel/i82371eb/acpi_tables.c index cd002e8135..a4cd1b3102 100644 --- a/src/southbridge/intel/i82371eb/acpi_tables.c +++ b/src/southbridge/intel/i82371eb/acpi_tables.c @@ -6,18 +6,27 @@ #include <device/device.h> #include "i82371eb.h" +static void generate_cpu_entry(int cpu) +{ + int pcontrol_blk = DEFAULT_PMBASE + PCNTRL, plen = 6; + + acpigen_write_processor(cpu, pcontrol_blk, plen); + acpigen_pop_len(); +} + void generate_cpu_entries(const struct device *device) { - int cpu, pcontrol_blk=DEFAULT_PMBASE+PCNTRL, plen=6; + int cpu; int numcpus = dev_count_cpu(); + printk(BIOS_DEBUG, "Found %d CPU(s).\n", numcpus); /* without the outer scope, further ssdt addition will end up * within the processor statement */ acpigen_write_scope("\\_SB"); - for (cpu=0; cpu < numcpus; cpu++) { - acpigen_write_processor(cpu, pcontrol_blk, plen); - acpigen_pop_len(); - } + + for (cpu = 0; cpu < numcpus; cpu++) + generate_cpu_entry(cpu); + acpigen_pop_len(); } |