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authorElyes HAOUAS <ehaouas@noos.fr>2018-10-17 10:56:26 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-10-23 15:52:09 +0000
commita342f3937e7ce159fd170ab8cd26ba799a3bc9e4 (patch)
tree4bd4540ba11286f465272c1fbee62dbf5f9789f8 /src/southbridge/intel/i82371eb/smbus.c
parent9856892297ad997f586a1b4dd0a494f3764a0ce2 (diff)
src: Remove unneeded whitespace
Change-Id: I6c77f4289b46646872731ef9c20dc115f0cf876d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29161 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82371eb/smbus.c')
-rw-r--r--src/southbridge/intel/i82371eb/smbus.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82371eb/smbus.c b/src/southbridge/intel/i82371eb/smbus.c
index 3477c52c32..5b95c57d8d 100644
--- a/src/southbridge/intel/i82371eb/smbus.c
+++ b/src/southbridge/intel/i82371eb/smbus.c
@@ -68,7 +68,7 @@ static void pwrmgt_enable(struct device *dev)
* power-on default is 0x7fffbfffh */
if (gpo) {
/* only 8bit access allowed */
- outb( gpo & 0xff, DEFAULT_PMBASE + GPO0);
+ outb(gpo & 0xff, DEFAULT_PMBASE + GPO0);
outb((gpo >> 8) & 0xff, DEFAULT_PMBASE + GPO1);
outb((gpo >> 16) & 0xff, DEFAULT_PMBASE + GPO2);
outb((gpo >> 24) & 0xff, DEFAULT_PMBASE + GPO3);