diff options
author | Shamile Khan <shamile.khan@intel.com> | 2018-05-22 22:24:22 -0700 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-05-28 16:09:37 +0000 |
commit | dc3910cfd7e59301a323a7cd98339876e4f79f87 (patch) | |
tree | e6b233f73ec2f3e36a9a773dd899706d7ce354a5 /src/southbridge/intel/i82371eb/ide.c | |
parent | 89a82371e8633e0b982d0c914932042a379f0547 (diff) |
soc/intel/apollolake: Don't use pulldowns in standby state for 1.8/3.3V pins.
These pins should not have pull downs configured in standby state as that
can cause contention on the termination circuitry and lead to incorrect
behavior as per Doc# 572688 Gemini Lake Processor GPIOTermination
Configuration.
Furthermore, some of these pins were configured with normal termination
of None which would as per above mentioned document lead to a standby
termination of None anyways.
Instead of pull downs, use the IOSSTATE setting for driving low
via the Tx mode.
BUG=b:79874891, b:79494332, b:79982669
BRANCH=None
TEST=Flashed image and booted to OS on Yorp. Touchscreen does not
consume power in suspend state.
Change-Id: I7dcf3691b969d018b3cfb6af3f7467c9b523fee5
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://review.coreboot.org/26491
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/intel/i82371eb/ide.c')
0 files changed, 0 insertions, 0 deletions