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authorUwe Hermann <uwe@hermann-uwe.de>2007-11-30 02:08:26 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2007-11-30 02:08:26 +0000
commit9da69f83d9fd3b872afb38c24b373b0807c76b00 (patch)
tree10f1597c46c6dcfcf125953421c61fe8c5aebf64 /src/southbridge/intel/i82371eb/i82371eb_smbus.c
parent8d43b343cf390f67461b3121d101d16ebf9b5975 (diff)
Improve support for the Intel 82371FB/SB/AB/EB/MB southbridge(s):
- Implement ISA related support: - Initialize the RTC - Enable access to all BIOS regions (but _not_ write access to ROM) - Enable ISA (not EIO) support - Without the *_isa.c file, the Super I/O init is never performed - Improve IDE support: - Add config option to enable Ultra DMA/33 for each disk - Add config option to enable legacy IDE port access - Implement hard reset support - Implement USB controller support - Various code cleanups and improvements The code partially supports southbridges other than the 82371EB (but which are very similar), more complete support will follow. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2994 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82371eb/i82371eb_smbus.c')
-rw-r--r--src/southbridge/intel/i82371eb/i82371eb_smbus.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/src/southbridge/intel/i82371eb/i82371eb_smbus.c b/src/southbridge/intel/i82371eb/i82371eb_smbus.c
index 838380d7bb..ae1b29335a 100644
--- a/src/southbridge/intel/i82371eb/i82371eb_smbus.c
+++ b/src/southbridge/intel/i82371eb/i82371eb_smbus.c
@@ -18,26 +18,31 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include <stdint.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/smbus.h>
#include "i82371eb.h"
-static struct smbus_bus_operations lops_smbus_bus = {
+/* TODO: Needed later? */
+static const struct smbus_bus_operations lops_smbus_bus = {
};
-static struct device_operations smbus_ops = {
+static const struct device_operations smbus_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = 0,
.scan_bus = scan_static_bus,
- // .enable = i82371eb_enable, // TODO: Needed?
+ .enable = 0,
.ops_pci = 0, /* No subsystem IDs on 82371EB! */
.ops_smbus_bus = &lops_smbus_bus,
};
+/* Note: There's no SMBus on 82371FB/SB/MX and 82437MX. */
+
+/* Intel 82371AB/EB/MB */
static const struct pci_driver smbus_driver __pci_driver = {
.ops = &smbus_ops,
.vendor = PCI_VENDOR_ID_INTEL,