summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/i82371eb/i82371eb.c
diff options
context:
space:
mode:
authorSrinidhi N Kaushik <srinidhi.n.kaushik@intel.com>2020-06-03 12:40:44 -0700
committerTim Wawrzynczak <twawrzynczak@chromium.org>2020-06-09 18:43:26 +0000
commit6d81eceb74c3821b7a9e0aadda63c7231a3c9caf (patch)
tree6970ad490da0642aa3c92eb3c16132fef6512534 /src/southbridge/intel/i82371eb/i82371eb.c
parentd4acee887edb1282f2e15bccba24d11ec7f2a6b6 (diff)
vendorcode/intel/fsp: Update Tiger Lake FSP Headers for v3197
Update FSP headers for Tiger Lake platform generated based FSP version 3197 to include below additional UPD: FSPS: ITbtConnectTopologyTimeoutInMs Signed-off-by: John Zhao <john.zhao@intel.com> Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> Change-Id: I06d605b156c1e6f90921c20e0b8fbbe4d64916ce Reviewed-on: https://review.coreboot.org/c/coreboot/+/42046 Reviewed-by: Divya Sasidharan <divya.s.sasidharan@intel.corp-partner.google.com> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82371eb/i82371eb.c')
0 files changed, 0 insertions, 0 deletions