diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-02-08 18:14:34 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-02-11 11:34:37 +0000 |
| commit | 8a41f4b71e883ec66be511cb592ee19dfa6708c5 (patch) | |
| tree | d0f7d8e47ed1dbe3b27038a0232f89aaff8d261d /src/southbridge/intel/i82371eb/early_smbus.c | |
| parent | 5b14116a04b4b96d25f825bef8f34caf4bd51466 (diff) | |
device/pci_ops: Move questionable pci_locate() variants
These are defined for __SIMPLE_DEVICE__ when PCI
enumeration has not happened yet. These should not
really try to probe devices other than those on bus 0.
It's hard to track but there maybe cases of southbridge
being located on bus 2 and available for configuration, so
I rather leave the code unchanged. Just move these out of
arch/io.h because they cause build failures if one attempts
to include <arch/pci_ops.h> before <arch/io.h>.
There are two direct copies for ROMCC bootblocks to
avoid inlining them elsewhere.
Change-Id: Ida2919a5d83fe5ea89284ffbd8ead382e4312524
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31304
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel/i82371eb/early_smbus.c')
| -rw-r--r-- | src/southbridge/intel/i82371eb/early_smbus.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82371eb/early_smbus.c b/src/southbridge/intel/i82371eb/early_smbus.c index de16717416..4e91c0aabf 100644 --- a/src/southbridge/intel/i82371eb/early_smbus.c +++ b/src/southbridge/intel/i82371eb/early_smbus.c @@ -16,6 +16,7 @@ #include <stdint.h> #include <arch/io.h> +#include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_def.h> #include <southbridge/intel/common/smbus.h> |