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| author | Jakub Czapiga <jacz@semihalf.com> | 2020-11-16 15:25:34 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-22 22:33:56 +0000 |
| commit | f9961fff31b3d91616e3526a4430733270fc109b (patch) | |
| tree | b88fc32f14c5baabdc508449acfba835ac6c5850 /src/southbridge/intel/i82371eb/chip.h | |
| parent | fde084bc490daf99da85292ef87d6dcf3446c212 (diff) | |
tests: Add lib/cbmem_console-test test case
Add test case executed twice, once for ROMSTAGE and once RAMSTAGE.
Each test is named and visible in cmocka output with stage in its name.
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I464eee61f538188427bec730d2e004c7b76cca67
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47642
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Diffstat (limited to 'src/southbridge/intel/i82371eb/chip.h')
0 files changed, 0 insertions, 0 deletions