diff options
| author | Uwe Hermann <uwe@hermann-uwe.de> | 2007-05-29 10:37:52 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2007-05-29 10:37:52 +0000 |
| commit | 1410c2d2192c4f2e782ac9af97c9df0165c3974e (patch) | |
| tree | 480da58f1adfd2c4e7e9632cfe19049ef0ce2105 /src/southbridge/intel/i82371eb/chip.h | |
| parent | 861f96403777c8f4475ca94613c5142075dd0cdf (diff) | |
Intel 82371EB: Add IDE init support.
In a mainboard's Config.lb file you can configure whether the primary
and/or secondary IDE interfaces shall be enabled.
Also, various fixups in the rest of the southbridge code, most notably
the early SMBus code, plus some documentation improvements.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Corey Osgood <corey_osgood@verizon.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2703 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82371eb/chip.h')
| -rw-r--r-- | src/southbridge/intel/i82371eb/chip.h | 39 |
1 files changed, 30 insertions, 9 deletions
diff --git a/src/southbridge/intel/i82371eb/chip.h b/src/southbridge/intel/i82371eb/chip.h index 58efa3b66f..2dac6d14ec 100644 --- a/src/southbridge/intel/i82371eb/chip.h +++ b/src/southbridge/intel/i82371eb/chip.h @@ -1,13 +1,34 @@ -#ifndef I82371EB_CHIP_H -#define I82371EB_CHIP_H +/* + * This file is part of the LinuxBIOS project. + * + * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ -struct southbridge_intel_i82371eb_config -{ - unsigned int ide0_enable : 1; - unsigned int ide1_enable : 1; -}; +#ifndef SOUTHBRIDGE_INTEL_I82371EB_CHIP_H +#define SOUTHBRIDGE_INTEL_I82371EB_CHIP_H + +#include <device/device.h> -struct chip_operations; extern struct chip_operations southbridge_intel_i82371eb_ops; -#endif /* I82371EB_CHIP_H */ +struct southbridge_intel_i82371eb_config { + int ide0_enable:1; + int ide1_enable:1; + int usb_enable:1; +}; + +#endif /* SOUTHBRIDGE_INTEL_I82371EB_CHIP_H */ |