diff options
author | Richard Smith <smithbone@gmail.com> | 2006-07-24 04:25:47 +0000 |
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committer | Richard Smith <smithbone@gmail.com> | 2006-07-24 04:25:47 +0000 |
commit | cb8eab482ff09ec256456312ef2d6e7710123551 (patch) | |
tree | 7bc1297911194e564b967efba4a03c4dde5f7a13 /src/southbridge/intel/i440bx/chip.h | |
parent | 4788effb045ae1f71d89c78a0b16a93d5ba79e89 (diff) |
add framework for i440bx chipset
add support for NSC pc87351 SuperIO
add Bitworks/IMS manboard config
This is a very basic framework for the i440bx chipset and the
Bitworks IMS board that uses it. Most things are
structure only.
Known issues:
- SMbus reads to the RAM SPD come back
all zero.
- dump_spd_registers() is commented out since it breaks with
the default setting of generic_dump_spd.c where it wants
2 memory controllers.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2347 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i440bx/chip.h')
-rw-r--r-- | src/southbridge/intel/i440bx/chip.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/southbridge/intel/i440bx/chip.h b/src/southbridge/intel/i440bx/chip.h new file mode 100644 index 0000000000..5952e38582 --- /dev/null +++ b/src/southbridge/intel/i440bx/chip.h @@ -0,0 +1,13 @@ +#ifndef I440BX_CHIP_H +#define I440BX_CHIP_H + +struct southbridge_intel_i440bx_config +{ + unsigned int ide0_enable : 1; + unsigned int ide1_enable : 1; +}; + +struct chip_operations; +extern struct chip_operations southbridge_intel_i440bx_ops; + +#endif /* I440BX_CHIP_H */ |