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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-03-19 21:04:23 +0200 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-06-04 11:22:53 +0200 |
commit | 580e7223bb617cfa14bf24e48bb39bac47c4e8e0 (patch) | |
tree | 13d7034347e8497dcbf7699746830727b33084bd /src/southbridge/intel/i3100/pciexp_portb.c | |
parent | 2d2367cd95dc6ab2dd51b1005675e42bab417769 (diff) |
devicetree: Change scan_bus() prototype in device ops
The input/output value max is no longer used for tracking the
bus enumeration sequence, everything is handled in the context
of devicetree bus objects.
Change-Id: I545088bd8eaf205b1436d8c52d3bc7faf4cfb0f9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8541
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/i3100/pciexp_portb.c')
-rw-r--r-- | src/southbridge/intel/i3100/pciexp_portb.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/southbridge/intel/i3100/pciexp_portb.c b/src/southbridge/intel/i3100/pciexp_portb.c index 815c0812d4..41e921c6f5 100644 --- a/src/southbridge/intel/i3100/pciexp_portb.c +++ b/src/southbridge/intel/i3100/pciexp_portb.c @@ -39,7 +39,7 @@ static void pcie_init(struct device *dev) { } -static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max) +static void pcie_scan_bridge(struct device *dev) { u16 val; u16 ctl; @@ -56,7 +56,8 @@ static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max) hard_reset(); } } while (val & (3<<10)); - return pciexp_scan_bridge(dev, max); + + pciexp_scan_bridge(dev); } static struct device_operations pcie_ops = { |